Could quantum hardware run a simulation?
In principle yes, as a batch architecture, but with an advantage only if more than one timestep’s worth of state fits in qubit memory. The ideas here are the ones on this blog most likely to change with future advancements in quantum computing.
Quantum hardware seems to naturally fit the batch simulation architecture in the same way that specialised classical hardware does.
In order to utilise this hardware within a given batch evaluation, one would need to:
- prepare the initial state of qubits
- encode the state partition histories from CPU memory into these qubits
- run quantum gates which encode the logic for multiple timesteps of the simulation
- entangle the next state values at each timestep with ancilla qubits or rely on the qubits for state partition histories themselves
- and measure these next state values in order to write the data to CPU memory.
Note also that the no-cloning theorem means we cannot simply copy the qubits which have run the quantum gates; the circuit must run separately for each simulation trajectory.
Therefore, you only get a quantum advantage if you can store more than one timestep worth of simulation next state values in qubit memory.
Otherwise, if you only effectively have one instantaneous timestep of qubit memory to use, the processing time will likely be dominated by I/O writing to and from the qubits during the simulation. This is also known as the quantum I/O bottleneck.